Non-volatile memory devices have been developed by the semiconductor integrated circuit industry for various applications such as computers and digital communications. A conventional non-volatile or flash memory device includes a plurality of memory cells typically organized in a plurality of memory sectors. Within each memory sector, the memory cells are arranged in an array comprising a plurality of rows and a plurality of columns. A plurality of word lines are coupled to the respective rows of the memory cells, and a plurality of bit lines are coupled to the respective columns of the memory cells. Each of the memory cells may be a typical binary dual-gate NOR device, for example, which comprises a source, a drain and a gate. Each memory cell is capable of storing one bit. During the operation of a conventional non-volatile memory, a memory cell is programmed by supplying a pump current to the drain of the memory cell through the respective bit line to which the memory cell is connected when the non-volatile memory is in a conventional embedded program mode.
When the memory cells are in a conventional embedded program mode, it is usual that more than one bit and sometimes all of the bits need be programmed on each of the word lines For example, if a memory sector comprises a 16-bit words, then a row of sixteen memory cells are disposed on each word line, and sixteen bit lines are connected to the sixteen memory cells, respectively.
In a conventional embedded program mode, a pump current is supplied to the drain of each memory cell to be programmed. A conventional drain pump is typically capable of supplying only a limited amount of total pump current to some but not all of the bit lines simultaneously. For example, in conventional programming of flash memory cells comprising typical dual-gate NOR devices, wherein each NOR gate stores either bit "0" upon being "programmed" or bit "1" upon being "erased", a pump current typically on the order of about 0.5 mA need be provided to the drain of each memory cell to be programmed with bit "0" through the respective bit line.
However, a conventional internal drain pump with a typical voltage supply of 3 V or lower is typically limited in its capability to supplying pump currents to the drains of no more than five of the memory cells at a time. In order to program a 16-bit word, for example, the sixteen bit lines are grouped into four sets, each set comprising four bit lines. When the memory cells are programmed in a conventional embedded program mode, the conventional internal drain pump is connected to provide pump currents to program the memory cells on the respective bit lines one set at a time. For example, a typical 16-bit word with bits numbered 0-15 may be grouped into four sets of bits numbered 0-3, 4-7, 8-11 and 12-15. When any set of four bits are to be programmed with up to four zeroes, this arrangement ensures that a sufficient pump current is supplied to the drain of each of the memory cells through the respective bit line.
Because the conventional internal drain pump has a limited current supply and is typically capable of programming the memory cells on the bit lines only one set at a time, it takes a plurality of pulses generated by the internal drain pump to be supplied to different sets of bit lines during the programming of each word along each word line. Moreover, the power from the internal drain pump need be switched to different sets of bit lines during the programming of each word. Therefore, programming of a whole sector of memory cells can be time consuming in the conventional embedded program mode.
Therefore, there is a need for a method of programming the memory cells in the non-volatile memory with a programming speed faster than that which is achieved by the conventional embedded programming mode.